The Indian Institute of Technology Guwahati researchers have contributed fundamental to memory architecture by preventing redundancy in data values and increasing slow and frequent writing in multi-core processor systems.
IIT Guwahati Researchers have developed a method for resolving problems in the computer system domain.
Specific contributions in multi-core processor-based systems that require the same large on-chip memory to meet the request of application data and hence prevent energy consumption to ensure fixed temperatures under the thermal design power budget (TDP).
Explain the challenge of multi-core processor-based systems, “Pattern access data access is not distributed uniformly and hence leads to several commands writing to certain memory locations compared to others.
Locations that are very written like that are susceptible to Aus and thus prevent the use of devices Complete memory without correction errors, “explained Professor Hemangee Kapoor, the CSE Department, IIT Guwahati said to handle this non-uniformity method, IIT Guwahati developed this method to distribute access equally throughout the overall memory capacity to reduce wear pressure on a lot Written and also work in areas that avoid writing excessive values by extending the Wear-Out.
“Slowly and frequent writing can be directed back to the SRAM partition while saving NVM so as not to be written with frequent access.
Such structure is called hybrid memory,” added Kapoor.
The current and future contribution of researchers will help reduce the weaknesses of promising memory and reduce their adaptability.
After several deficiencies removed, scientists can find newer roads to use such technology without worrying about their limitations.
Artificial intelligence (AI) and machine learning (ML) are used as a tool to solve some real time problems.
However, they involve large calculations on large datasets.
The building is close to memory accelerators to process efficient data in performance and energy.
The research team also tried to build parallel architectural designs that were adjusted to provide better clasps.
IIT Guwahati the researchers developed a new memory architecture method to increase the speed of the processor
